A(1:0 D121 D,A1] WE mux > mux mux Decoder D12 DI1] Dlo] a. To read from the fourth memory location, what must the values of A1:0> and WE be? To read the 4th memory location, A1 WE- b. To change the number of entries in the memory from 4 to 60, howmany address lines would be needed? A total of Would the addressability of the memory change after increasing the number of memory entries to 60? address lines are required for a memory with 60 locations. . Please enter "Y" or "N". c suppose the minimum width (in bits of the program counter the program counter s a special regster within a CPU, and we wil discuss t in detal . e next apte S hem um umber of bits needed to address all 60 locations in our memory from part (b). How many additional memory locations could be added to this memory without having to alter the width of the program counter?Suppose the minimum width (in bits) of the program counter A program counter of width n can address 2n- locations, where n is your answer from part (b). So without changing the width of the program counter more locations can be added to the memory