ADDRESS BUS

Fig. $3\mathrm{.}12256$B memory bank example$3\mathrm{.}3$ Figure $3\mathrm{.}12$ shows two memory banks being used for connection with a $16-$bit

data bus, one bank set for the even numbered addresses and the other for the

odd numbered addresses.

a$.$ What would happen if the least significant address line from the micro$-$

processor is connected to the least significant address line in both banks?

b$.$ How would you solve the problem presented in $($a$)?$