Advance microprocessors

In an ARM Cortex-M4 processor a. exceptions include system reset, system wakeup events, system faults, and interrupts b. exceptions are interrupts c. exceptions are special type of interrupts When an ARM Cortex-M4 processor is processing an interrupt service routine, a. the processor operates in thread mode. b. the processor operates in handler mode. c. the processor operates in either thread mode or handler mode depending on the type of interrupts. Before an ARM Cortex-M4 processor branches to an interrupt service routine to handle an interrupt request, a. the processor saves the program counter (PC) register in the main stack. b. the processor saves the program counter (PC) and program status register (PSR) in the main stack. c. the processor saves the registers PSR, PC, LR, R12, R3, R2, R1, and R0 in the main stack. The main interrupt controller of an ARM Cortex-M4 processor is a. the external interrupt controller (EXTI). b. the nested vector interrupt controller (NVIC). c. global interrupt controller. If three interrupt SysTick, EXT10 and EXT12 occur simultaneously and they are have the same group priority, the sequence in which the processor will process the handlers is a. EXT12, EXT10 and SysTick. b. EXT10, EXT12 and SysTick. c. SysTick, EXT10 and EXT12. The number of interrupt sources handled by the external interrupt/event controller (EXTI) is a. 16. b. 23. c. 82. The system timer SysTick of an ARM Cortex-M4 processor is a. 16-bit count-down timer. b. 24-bit count-down timer. c. 32-bit count-down timer