All 3 tasks please...

Total marks: 100 Task 1 20 marks Simplify the functions described below using K-maps, draw circuit diagram for simplified functions and show truth tables. 1. F. (I, J, K) = (m,m,,m,,m) 2. F2 (A, B, C, D)= (m,,m,m,,m,m,my,m,,m2,m4) 3. F3 (X, Y, Z, W) = for input of numbers in [0, 15] as binary bits, the output is high when input is a prime number and is low otherwise, 4. F4 (A, B, C, D)= ||(M,,M3,M,,M,) (hint: convert to minterm expression first) Task 2 20 marks 1. Make a 4-to-16 decoder and show its circuit diagram in both ways: - Create every minterm via multiple 4-input AND gates. - Employ hierarchical design, use smaller decoders and several AND gates 2. Make an 8-to-1 multiplexer with a 3-to-8 decoder and two groups of 8 AND gates each, plus an OR gate. The 3-to-8 decoder must be done with hierarchical design and several AND gates. You are strongly advised to use Logic Works 5 or similar circuit design software to create circuit diagrams for this question. For hierarchical design, you can draw over the exported circuit diagram to outline smaller hierarchical parts, Task 3 30 marks] Create a Programmable Logic Array (PLA) with 2 data inputs (A, B) and 4 data outputs (W, X, Y, Z) that implements the following functions: Output S, SO Function W Q = A XOR B X Q = A XNOR B Q = A NAND B Q = A NORB 00 Then, use a 4-to-1 multiplexer and operation selection bits S, and S, to propagate only the selected PLA output to the main circuit output designated as Q. Draw the circuit diagram that shows the implementation of the PLA and 4-to-1 multiplexer. You are restricted to use only AND, OR and NOT gates, thus make sure that you show correct functions and truth tables for each output