Architecture Components

Your architecture should require the following components. You should attempt to create these

components as modular parts and demonstrate that each component works as expected before

integrating the components in the complete module.

$$ Program $/$ Data Memory

$$ Registers $/$ Temporary Storage

$$ Instruction Fetch Unit

$$ Instruction Decode Unit

$$ Instruction Execution Unit

Design Process

A key difference between this project and prior labs is that you have full control of the design as long as

the architecture meets the requirements specified in the Project Description and can implement the set

of instructions defined above. In the design process, you should follow the steps below. Each of these

design steps should be indicated in your presentation and final report.

$1.$ Define$/$specify the instruction machine code that you will use to implement the instructions above.

For each instruction, you should indicate how the $16$ bits are assigned and used.

$2.$ Describe the instruction processing flow chart. For each instruction $/$ instruction type, you should

indicate the required steps that the architecture will execute. For example, ALU operations should

load operands from specified register$($s$),$ perform the specified ALU operation, and write the result

to the specified destination register.

$3.$ Define and depict the data path for non$-$control instructions that shows the connections between

your register unit, data memory unit, and ALU $($along with any multiplexers or other components$)$

$4.$ Specify the relationship between instructions and multiplexer $/$ ALU select bits along with any other

control signals.

$5.$ Define your state diagram and SM chart that allows the architecture to $($a$)$ load instructions from

current PC address, $($b$)$ decode instruction, $($c$)$ execute instruction, and $($d$)$ update PC$.$ You may

implement this as a single large state diagram, or individual state diagrams with wait states to

indicate when other state diagrams are active.

Programs to Execute

The two programs below should be used to demonstrate that your architecture works as desired. You

should observe the memory values in your defined memory implementation in simulation and show that

the memory is as expected after execution of the program. Program $1$ demonstrates a simple sequence

of load$/$store and ALU operations while Program $2$ includes control commands. Note that it is up to you

to convert the programs into instructions that can be understood by your architecture

Program $1$

int A $=5$;

int B $=12$;

int my$\_$arr$[4]$

my$\_$arr$[0]=$ A$+$B;

my$\_$arr$[1]=$ A or B;

my$\_$arr$[2]=$ A and B;

my$\_$arr$[3]=$ my$\_$arr$[1]-$ my$\_$arr$[2]$;

Grading Metrics

Program $2$

int range $=8$;

int Fib$[$range$]$;

Fib$[0]=0$;

Fib$[1]=1$;

for $($int i $=2$; i $<$ range; i$++)$

$\{$

Fib$[$i$]=$ Fib$[$i$-1]+$ Fib$[$i$-2]$;

$\}$