ARM Data Addressing, suppose $r0=08000,$ and the memory layout is as follows.

$\backslash$table$[[$Address$,$Data$],[0$x$8000,0$x$1$A$],[0$x$8001,0\backslash$times $2$E$],[0$x$8002,0\backslash$times $2$B$],[08003,$OxOD$],[0$x$8004,$OxFC$],[0$x$8005,$OxA$3],[0$x$8006,$OXCD$],[08007,$OxE$9]]$

i$.$ ARM processors can be configured as big$-$endianness or little$-$endianness. What is the value of $r1$ after running LDR r$1,[$r$0]?(2)$

a$.$ If little endianness, r$1=$

b$.$ If big endianness. $r1=$

ii$.$ Suppose the system is based on little endianness. What are the values of r$1$ and r$0$ if these instructions are executed separately? $(3)$

LDR $11.[$r$0,$#$4]$

$r0=$

r$1=$

LDR r$1.[$r$0],$#$4$

$r0=$

$r1=$

LDR r$1,[$r$0,$#$4]!$

$r0=$

$r1=$