Question: Assembly Language Lab # 5 Logic Circuit Design The purpose of this lab is to use the ( Windows ) P - spice circuit simulation

Assembly Language
Lab #5
Logic Circuit Design
The purpose of this lab is to use the (Windows) P-spice circuit simulation program to determine whether there is any difference in the behavior of the two different implementations of the XOR circuit shown in Section 3.3.3. You may either create a file for each circuit or put both circuits in one file. When you are ready you can hit the Simulation button to run the circuits and observe their behavior.
To create the circuits:
Open the P-spice schematics program.
Get two clocks. Configure them the same except that for one use the default ON and OFF time values of .5uS but for the other use ON and OFF time values of 1uS. For both clocks make the delay time .01uS. To do this
(a) Using Draw (a menu item) select Get New Part.
(b) Scroll down and select Digiclock.
(c) Select Get and Place and deposit two of these clocks in your circuit.
(d) Hit Escape to stop fetching clocks.
(e) Get into the Configure box by double clicking on the deposited clock. (This is tricky. Don't move the mouse.)
(f) Configure the ON OFF and Delay times as mentioned above.
(g) Save your configuration.
Get your TTL logic gates using Get New Part under Draw. NOT gates are 7404, AND gates are 7408, and OR gates are 7432. Again hitting the escape key releases you.
Connect your circuit together with wires using Draw Wire. One click on the Source and One click on the Destination does it. Don't try dragging.
Using The 'V' menu bar attach voltage probes. Attach one to the output of each clock and one to the output of the circuit that your are simulating.
Save the file.
Prepare to run it. Choose Analysis from the menu and click on Setup. Check the Transient box and click on that. Change the Final time to 8000 ns (from 1000ns). It should now be ready to run.
To run the simulation, hit the simulation button. It's yellow with a red trace on it.
To do the labs:
Run each file under P-spice. What is the difference in the behavior of the two circuits? Slartch the graphs of each here highlighting the difference.
What is the reason for the difference in behavior?
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 Assembly Language Lab #5 Logic Circuit Design The purpose of this

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