Assignment

Memory Map Implementation

Combine the following simplified Microprocessor Unit, RAMs, ROM, and I$/$O

ports using appropriate hardware interface in order to achieve the memory

map indicated.

Submission: You need to submit a single clear drawing of the connections.

You can use any logical gate that you think you need.

Deadline: July $2^{nd}($As always, there is a $10\%$ deduction for each day delay. The

assignment will not be accessible from July $5^{th}.)$

Assignment $->$ Assignement$1$

Please answer with the diagram as ask in the question by using any logical gate