Question: Assume Core i 7 CPU ( 7 cores ) , with AddressSize = 4 8 bits, and BlockSize = 6 4 Bytes. Each core has

Assume Core i7 CPU (7 cores), with AddressSize=48 bits, and BlockSize =64 Bytes. Each core has L1-instructions, L1-Data and L2-unified cache. In addition to L3-unified cache which is shared amongst all cores as follows:

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