Question: Cache Memory Assume Core i 7 CPU ( 7 cores ) , with AddressSize = 4 8 bits, and BlockSize = 6 4 Bytes. Each

Cache Memory Assume Core i7 CPU (7 cores), with AddressSize=48 bits, and BlockSize =64 Bytes. Each core has L1-instructions, L1-Data and L2-unified cache. In addition to L3-unified cache which is shared amongst all cores as follows: L1(i-cache and d-cache) both are write-through with: Size=32 KB Associativity =4-ways L2 Cache (write-back) Size=256 KB Associativity =8-ways L3 Cache (write-back) Size=8 MB Associativity =16-ways Find the total number of bits in: L1(i-cache and d-cache), L2 and L3(no need to repeat that for each core). Note: Be sure to consider all required bits (validation, dirty, tag, etc), and to show your steps to find the solution.
Cache Memory Assume Core i 7 CPU ( 7 cores ) ,

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