Question: Assume that a processor with a 5-stage pipeline executes at 80 MHz and that the processor can fetch at most I instruction in each clock

Assume that a processor with a 5-stage pipeline executes at 80

Assume that a processor with a 5-stage pipeline executes at 80 MHz and that the processor can fetch at most I instruction in each clock cycle. (a) How long is then the clock period? (b) Which of the following alternatives is correct: i) The CPI is always larger or equal to 1, ii) the CPI is always smaller than 1, or ii the CPI is always equal to 1

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