Question: Assume that we only consider the following latencies for elements in a data path as in Figure 4.11 of the textbook. How long does it

Assume that we only consider the following latencies for elements in

Assume that we only consider the following latencies for elements in a data path as in Figure 4.11 of the textbook. How long does it take to complete the execution of an ADD instruction? How long does it take to complete the execution of a LW instruction? What is the clock cycle time if we only support ADD, LW, and BEQ instructions? If we can reduce the latency of only one given data path elements by 20%, which component should it be? Why

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