Assume the following MIPS code is executed:

.data

x: .word 4, 12, 10, 21, 7

add $t0, $0, $0

addi $t1, $0, 20

lw $s0, x($t0)

addi $t0, $t0, 4

j loop

done: addi $s0, $s0, 5

sw $s0, x($t0)

Draw the pipeline execution diagram for this code, assuming no delay slots and that branches executes in the EX stage.

Repeat (a), but assume that delay slots are used

Describe the hazard detection logic and forwarding support needed to support branch execution in the ID stage.