(b) (3 points) After the access sequence has been completed, show the final tag values for each block in the following table. Block 0 1 2 3 4 5 6 7 Tag 8. (12 points) A processor has a small direct-mapped cache capable of holding 8 cache lines. Each cache line contains 32 bytes of data. The processor uses 12-bit memory addresses. Assume that the initial tag values for each cache block are as follows: Block 0 1 2 3 4 5 6 7 Tag 00100 00000 Invalid Invalid 00000 Invalid Invalid Invalid The processor reads data sequentially from the following decimal addresses: 40, 64, 1024, 128, 256, 1024, 512 Answer the following question: (a) (9 points) For each of the above addresses, indicate whether the cache access will result in a hit or a miss. Show your work