This exercise examines the impact of different cache designs, specifically comparing associative caches to the direct-mapped caches. For these exercises, refer to the address stream below. 3, 180, 43, 2, 191, 88, 190, 14, 181, 44, 186, 253

a. Using the sequence of references above, show the final cache contents for a three-way set associative cache with two-word blocks and a total size of 24 words. Use LRU replacement. For each reference identify the index bits, the tag bits, the block off set bits, and if it is a hit or a miss.

b. Using the references above, show the final cache contents for a fully associative cache with one-word block and a total size of 8 words. Use LRU replacement. For each reference identify the index bits, the tag bits, and if it is a hit or a miss.