(b) The Finite State Machine (FSM) for a sequential circuit is shown in Figure Q1(b), which...

 

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(b) The Finite State Machine (FSM) for a sequential circuit is shown in Figure Q1(b), which has two inputs, X and Y, and an output Z. (i) (ii) Draw the Algorithmic State Machine (ASM) chart for the FSM in Figure Q1(b). [5 marks] Design the sequential circuit using the one flip-flop per state technique. [8 marks] Reset 00 a A/0 01,10,11 00 B/0 01,10,11 01,10,11 Figure Q1(b) C/1 Do 00 (b) The Finite State Machine (FSM) for a sequential circuit is shown in Figure Q1(b), which has two inputs, X and Y, and an output Z. (i) (ii) Draw the Algorithmic State Machine (ASM) chart for the FSM in Figure Q1(b). [5 marks] Design the sequential circuit using the one flip-flop per state technique. [8 marks] Reset 00 a A/0 01,10,11 00 B/0 01,10,11 01,10,11 Figure Q1(b) C/1 Do 00