Bijan's pipelined processor features separate instruction and data caches. The instruction cache (I-cache) has a single...
Fantastic news! We've Found the answer you've been seeking!
Question:
![](https://dsd5zvtm8ll6.cloudfront.net/questions/2024/04/660d190eaad41_1712134412475.jpg)
![](https://dsd5zvtm8ll6.cloudfront.net/questions/2024/04/660d191993e5d_1712134423777.jpg)
Transcribed Image Text:
Bijan's pipelined processor features separate instruction and data caches. The instruction cache (I-cache) has a single level and the data cache (D-cache) has two levels, as shown in the figure below. The processor achieves an average CPI of 1.2 not accounting for memory stalls. L1 I-Cache has a hit ratio of 99%. L1D-Cache has a hit ratio of 85%. L2 D-Cache has a hit ratio of 75%. Memory reference instructions account for 20% of all the instructions executed. Out of these memory reference instructions 70% are reads and 30% are writes. L1 Cache access time is 2 cycles. L2 Cache access time is 40 cycles. All cache blocks are word-sized. Upon a cache miss, the CPU experiences a latency of 120 cycles for read from memory; and a latency of 6 cycles on write to memory. Assume write-through and write-allocate policy is being used. There is no write-buffer in the datapath between the CPU and memory bus, hence the CPU must stall until each write reaches memory. Answer the following questions. L1 I-CACHE L1 D-CACHE MAIN MEMORY Show your work to receive credit. Round final answers to 3 significant digits. L2 D-CACHE a. Calculate the loads and stores as percentages of total instructions. (2 points) b. Calculate the EMAT for I-Cache read, in terms of CPU cycles. (2 points) c. Calculate the EMAT (Effective Memory Access Time) of L2 D-Cache Reads, in terms of CPU cycles. Then, calculate the EMAT of L1 D-Cache Reads, in terms of CPU cycles. (4 points) d. Calculate the EMAT of L2 D-Cache Writes, in terms of CPU cycles. Then, calculate the EMAT of L1 D-Cache Writes, in terms of CPU cycles.(4 points) e. Calculate the effective CPI of the processor accounting for the memory stalls. (2 points) Bijan's pipelined processor features separate instruction and data caches. The instruction cache (I-cache) has a single level and the data cache (D-cache) has two levels, as shown in the figure below. The processor achieves an average CPI of 1.2 not accounting for memory stalls. L1 I-Cache has a hit ratio of 99%. L1D-Cache has a hit ratio of 85%. L2 D-Cache has a hit ratio of 75%. Memory reference instructions account for 20% of all the instructions executed. Out of these memory reference instructions 70% are reads and 30% are writes. L1 Cache access time is 2 cycles. L2 Cache access time is 40 cycles. All cache blocks are word-sized. Upon a cache miss, the CPU experiences a latency of 120 cycles for read from memory; and a latency of 6 cycles on write to memory. Assume write-through and write-allocate policy is being used. There is no write-buffer in the datapath between the CPU and memory bus, hence the CPU must stall until each write reaches memory. Answer the following questions. L1 I-CACHE L1 D-CACHE MAIN MEMORY Show your work to receive credit. Round final answers to 3 significant digits. L2 D-CACHE a. Calculate the loads and stores as percentages of total instructions. (2 points) b. Calculate the EMAT for I-Cache read, in terms of CPU cycles. (2 points) c. Calculate the EMAT (Effective Memory Access Time) of L2 D-Cache Reads, in terms of CPU cycles. Then, calculate the EMAT of L1 D-Cache Reads, in terms of CPU cycles. (4 points) d. Calculate the EMAT of L2 D-Cache Writes, in terms of CPU cycles. Then, calculate the EMAT of L1 D-Cache Writes, in terms of CPU cycles.(4 points) e. Calculate the effective CPI of the processor accounting for the memory stalls. (2 points)
Expert Answer:
Answer rating: 100% (QA)
To answer these questions well need to work through each part stepbystep Lets begin a Calculate the loads and stores as percentages of total instructions Given that memory reference instructions accou... View the full answer
Related Book For
Logic And Computer Design Fundamentals
ISBN: 9780133760637
5th Edition
Authors: M. Morris Mano, Charles Kime, Tom Martin
Posted Date:
Students also viewed these computer network questions
-
- The bullwhip effect can occur in every supply chain even in a relatively stable market. Describe evidence of the bullwhip effect in tesla and suggest a way to mitigate such an effect -Describe the...
-
Q1. You have identified a market opportunity for home media players that would cater for older members of the population. Many older people have difficulty in understanding the operating principles...
-
Portray in words what transforms you would have to make to your execution to some degree (a) to accomplish this and remark on the benefits and detriments of this thought.You are approached to compose...
-
DBU Systems manufactures testing equipment for the communications industry. In developing a new device for maritime communication, the design group has estimated the following unit costs. Metal...
-
Identify any related party transactions between Mr Heggarty and (1) Citadel Resources, (2) OZ Minerals. Explain how these related party transactions might be capable of affecting the profit or loss...
-
Show that \(f(t) * \delta(t)=f(t)\). That is, show that convolving any waveform \(f(t)\) with an impulse leaves the waveform unchanged.
-
Calories and salt in hot dogs. Is the correlation r for the data in Figure 14.11 near 1, clearly negative but not near 1, near 0, clearly positive but not near 1, or near 1? Explain your answer.
-
In teaching this case, a major theme has to be BPs rebranding efforts and how the company must strive to repair its damaged reputation in the wake of the Deepwater Horizon incident. While BP is not...
-
I need details answer 35. Loren owns three passive activities that have the following income and loss for the current year: Passive Activity A $25,000 Passive Activity B (10,000) Passive Activity C...
-
Emu Ltd owns all of the shares of Cassowary Ltd. In relation to the following intragroup transactions, all parts of which are independent unless specified, prepare the consolidation worksheet...
-
An employer has calculated the following amounts for an employee during the last week of June 2021. Gross Wages $1,800.00 Income Taxes $414.00 Canada Pension Plan $94.00 Employment Insurance $28.00...
-
Section Two: CASE ANALYSIS (Marks: 5) Please read the following case and answer the two questions given at the end of the case. Zara's Competitive Advantage Fashion houses such as Armani and Gucci...
-
The activity of carbon in liquid iron-carbon alloys is determined by equilibration of CO/CO2 gas mixtures with the melt. Experimentally at PT = 1 atm, and 1560C (1833 K) the equilibrated gas...
-
Apply knowledge of concepts and theories covered in the course to leader - the leader can either be themselves if they lead a team, someone real and personally known to them (such as a boss or leader...
-
A resistor in a dc circuit R = 1.2 2. The power dissipated P is a second-degree function of the voltage V. Graph P versus V from V = 0.0 V to V = 3.0 V.
-
You have been asked by a client to review the records of Waterway Company, a small manufacturer of precision tools and machines. Your client is interested in buying the business, and arrangements...
-
If you want to solve a minimization problem by applying the geometric method to the dual problem, how many variables and problem constraints must be in the original problem?
-
What are the materiality constraint and the conservatism constraint? AppendixLO1
-
What are the major sections in a classified balance sheet? AppendixLO1
-
What qualitative characteristics make accounting information useful? AppendixLO1
![Mobile App Logo](https://dsd5zvtm8ll6.cloudfront.net/includes/images/mobile/finalLogo.png)
Study smarter with the SolutionInn App