Binary weighted DACs such as the one in part $($a$)$ are limited to a resolution of

$8$ bits.

$($i$)($ii$)$ State and explain the reasons for this limitation$.[4]$

How are high resolution DACs, such as required for high quality digital

audio playback $(16-$bits$),$ implemented? Illustrate your answer with a $4-$

DAC in the $$high$-$resolution$$ architecture. $[6]$

The weighted capacitor DAC is also often used as a key building block in on$-$

chip analogue to digital converters $($ADC$).$ If $8-$bit resolution is desired and the

system clock is $2$ MHz$,$ specify the bandwidth limits of an analogue signal

which can be digitized by such a DAC$-$based ADC.