Build a $(5,8)$ global predictor that can monitor the history for at most $16$ distinct branches that occurred most recently in the program and can store the predictors for up to $64$ distinct branches. Note that in this processor all instructions are aligned in each memory lane: they are either set to start from byte $0$ or from byte $4$ in any given lane. Think about how many bits and which need to be fetched from the PC to obtain distinct branches as described above. This information has to be illustrated as well. Show how many and which bits are fetched to be used by the Branch History Table $($the hardware that monitors the recent branches in the program$),$ the size and the type of content of the BHT$.$ If your structures are getting too long and are repeated you can place "dots" $...$but you need to document exact numbers of any entry sizes and bit sizes you are using.