Question: bus system Question 4 Suppose the new memory-reference instruction instead of the AND instruction, listed below. This new instruction subtracts the content of the memory

 bus system Question 4 Suppose the new memory-reference instruction instead of
the AND instruction, listed below. This new instruction subtracts the content of

bus system Question 4 Suppose the new memory-reference instruction instead of the AND instruction, listed below. This new instruction subtracts the content of the memory from AC in the basic computer. Its symbolic designation is AC + AC-M[E4]. Et is the effective address that resides in the AR Assignment 4 Page 4 of 7 CMP 334 during To The implemented adder in the ALU in the basic computer cannot perform the subtraction directly. The subtraction must be done using the 2" complement of the subtrahend by complementing and incrementing 4C a) Create the sequence of register-transfer statements needed to execute this 10 instruction starting from T. Note that the value in AC should not change unless the instruction specifies a change in its content. You can exchange DR and AC REM ACERC b) Using the flowchart of the instruction Becade Opende eRONG cycle shown in Fig. 4, show the contents ARA in hexadecimal of registers PC, AR, DR. AC, IR, E, and SC of the basic computer Register 101 when this instruction is fetched from memory and executed. The initial content 2011 Indret of the PC is 7FF, the AC is 68CA, and E -0. The content of the memory at address 7FF is 8A9F. The content of the memory Em E AREVA at address A9F is 0C35. The content of the memory at address C35 is 42A3. Give E TH the answer in a table with seven columns, | menjadi one for each register and a row for each SC timing signal. Show the contents of the registers after the positive transition of each clock pulse. Fig. 4 Flowchart of the instruction cycle. Basic Computer Instruction Symow TED Her Code | Description Format AND OREX BACK AND memory word to AC ADD Add memory word to AC LDA Memory Reference Instructions 2 Axe Load AC from memory STA xxx DE (OP-code-000 - 110) Store content of AC Inte memory BUN Branch unconditionally BSA Goox Ex Increment and skipifero Der Branch and save return address CLA 7800 Register Reference Instructions Clear AC CLE 7400 Clear (OP-code = 111.1=0) CMA 7200 Complement AC CME 7100 Complement CIR 7080 Circulate right AC and E CIL 7040 Circulatelett AC and I INC 7020 Increment AC Inper Output Instructions SPA 7010 Skip extinst. AC is positive SNA 7008 (OP code 111, 1-1) Skip nextins AC Is negative SZA 7004 Skip next instr.AC is zero SZE 7002 Skip next instr. E is zero HLT 7001 Halt computer F800 Input character to AC OUT F400 Output character from AC 7200 Skip on input flag F100 Spon output flag BON FODO Interrupton HOF 7040 Interrupto CHE INP SKO COMPLETE MICRO-OPERATIONS OF THE BASIC COMPUTER Fetch RT AR PC R'T: IR - MAR), PC PC + 1 Decode RT: DO, 07 Decode IR(12-14). AR-IR(0 - 11), 1-IR(15) Indirect D,'IT: ARM[AR] Interrupt TT,T,'(IEN)(FGI + FGO): R-1 RT: ARO, TRPC RT M[AR] TR, PCO RT PC - PC +1, IENO.R.O. SCO Memory-Reference AND DR MAR] AC AC A DR, SCO ADD DR MAR] AC AC + DR. E C. SCO LDA DR MAR] ACDR, SCO STA MIAR) AC, SCO BUN PCAR, SCO BSA M[AR] PC, AR AR + 1 PCAR, SCO ISZ DR M[AR] DR DR + 1 MAR] - DR, if(DR-0) then (PC - PC + 1). SCO Register-Reference DIT, ET (Common to all register-reference instr) IR(0) B. (i = 0,1,2, ..., 11) r: SCO CLA B. ACO CLE B. EO CMA rB: AC + AC B EE CIR rB AC shr AC, AC(15) + E, EAC(O) CIL rB AC + shl AC, AC(O)- E, E-AC(15) INC AC AC + 1 SPA If(AC(15) =0) then (PC PC + 1) SNA If(AC(15) =1) then (PC - PC +1) SZA B. If(AC = 0) then (PC PC +1) SZE rB: IF E=0) then (PC - PC + 1) HLT rB S0 Input-Output DIT, EP (Common to all input-output instructions) IR(I) =B (i = 6,7,8,9,10,11) p: SC 0 INP PB AC(0-7) INPR, FGIO OUT OUTRAC(0-7), FGOO SKI PB IF(FGI=1) then (PC - PC + 1) SKO PB, If(FGO-1) then (PC + PC + 1) ION pB IEN 1 IOF PB IENO p

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