c. [10 points] Consider the following program. Assuming the starting address of array X is [0] (32 bits of 0). The type of each element of X is int (4 bytes). Indicate a cache hit or a cache miss for each memory access using a write-invalidate based snooping protocol, with a direct-mapped cache. What if the block size becomes 8 bytes? Initial states for all cache blocks are invalid. P2 XI1]+2; XI01++ x[1] = 3