Cache Mapping Schemes (10 pts)

Consider a byte-addressable computer with 16-bit addresses, a cache capable of storing a total of 2K bytes of data, and blocks of 8 bytes. Show the format (include field names and sizes) of a 16-bit memory address for:

a) direct mapped (2 pt)

b) fully associative (2pt)

c) 4-way set associative (2 pt)

d) Where (which block or set) in cache would the memory address BAD0₁₆ be mapped for each of three mapping techniques above? You can specify the answer in decimal if you wish. (4pts)