Question: Consider a byte - addressable computer with 1 6 - bit addresses, a cache capable of storing a total of 2 K bytes of data,
Consider a byteaddressable computer with bit addresses, a cache capable of storing a total of K bytes of data, and blocks of bytes. Show the format include field names and sizes of a bit memory address for:
a direct mapped
b fully associative
cway set associative
d Where which block or set in cache would the memory address BAD be mapped for each of the three mapping techniques above? Specify the answer in decimal.
Given a cache access time of ns a main memory access time of ns and a cache hit ratio of percent. Assuming fetches to main memory are started in parallel with lookups in cache, calculate the effective average access time of this system. There is no virtual memory on this system, no page table, no TLB
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