Can anyone help me with these lab questions?

Lab Assignment . CDA3201 Intro to Logic Design. Grade: /20 Name: 01,10 5) [20] At right is the state diagram for a Moore sequential 01.10 A/0 00 / circuit which monitors two inputs XiXo. When the two inputs XiXo are 00, the output Z toggles at every clock. When the two inputs XiXo are 11, the output Z toggles at every other clock. When the two inputs XiXo are different, the output Z holds its state and does not change until the inputs are equal again. Use the following table with the gray code assigned (easier to fill in the K-Map if use gray code 00 00C 01,10 01,10 Flip Flop Transition Present State (Q) Input (X) Output (Z) Next State (Q+) State Ji KiJo Ko Name A 0 0 0 1 1 0 B 01 0 1 1 0 0 1 1 0 D 1 0 0 1 1 0 5.a) [TA-4] Fill in the output and the next state columns of the table 5.b) [TA-4] Fill in the the next state columns of the table Lab Assignment . CDA3201 Intro to Logic Design. Grade: /20 Name: 01,10 5) [20] At right is the state diagram for a Moore sequential 01.10 A/0 00 / circuit which monitors two inputs XiXo. When the two inputs XiXo are 00, the output Z toggles at every clock. When the two inputs XiXo are 11, the output Z toggles at every other clock. When the two inputs XiXo are different, the output Z holds its state and does not change until the inputs are equal again. Use the following table with the gray code assigned (easier to fill in the K-Map if use gray code 00 00C 01,10 01,10 Flip Flop Transition Present State (Q) Input (X) Output (Z) Next State (Q+) State Ji KiJo Ko Name A 0 0 0 1 1 0 B 01 0 1 1 0 0 1 1 0 D 1 0 0 1 1 0 5.a) [TA-4] Fill in the output and the next state columns of the table 5.b) [TA-4] Fill in the the next state columns of the table