can i get help with this one please ?

1. (5 points) A FSM outputs a logic 1 every time two or more consecutive logic 1 's are input. It will similarly output a logic 1 every time two or more consecutive logic 0's are input. In class, we developed a Moore FSM state diagram for this specification. Derive a Mealy FSM state diagram for this same specification. 2. (7 points) Design a FSM that implements the above state table. Assume state B is the initial state. Use state assignments A=11,B=01,C=00 and D=10. You do not need to draw the schematics, but I want the excitation equations and the output equation. I want to see all of the steps you used in the design process