Can you answer this problem with a good step by step procedure?

PROBLEM 2 (18 PTS) . Complete the timing diagram of the following bit-serial adder. DX=1011, DY=1010. (8 pts) DY - 4 clk DX din RIGHT rstn SHIFT REG ~ dout MI L '0' - din SL RIGHT E E SHIFT REG DOU Xi X y Xi Q DI Ci+1 cout FA cin Ci S yi Si Ci rstn din '0'- RIGHT Si SHIFT REG out clk Cit1 Bit-serial Adder AS S 0000 The following FSM has 4 states, one input w and one output z. (10 pts) resetn The excitation equations are given by: " Q1(t + 1) - Qo(t) W Z Qo(t + 1) - Q1(t) @w FINITE STATE The output equation is given by: z = Q1(t)@Q.(t)@w MACHINE clock Is it a Mealy or Moore Machine? Why? V Provide the State Diagram (any representation) and the Excitation Table. (6 pts) V Sketch the Finite State Machine circuit. (3 pts)