Circuitry for the active$-$loaded MOS$-$differential amplifier with matched Q$1$ and Q$2$ saturated transistors is shown below. Differential gain of this amplifier is $80\frac{V}{V}$ and assume that $I_{\text{r}\text{e}\text{f}}=I=100A.$ Similarly the values of ${}_n*C_{ox}=3{}_p*C_{ox}=90\frac{A}{V^2}$; threshold voltage values are $V_{tn}=|V_{tp}|=0\mathrm{.}7V$ and $V_{An}=|V_{Ap}|=20V($Note: early voltage of MOS transistor is given by $V_A=I_D{r}_0).$ In addition, DC voltage at the gates of Q$6$ and Q$3$ is $+1\mathrm{.}5$ V whereas at the gates of Q$7,$ Q$4$ and Q$5,$ the DC voltage is $-1\mathrm{.}5$ V $.$ In order to satisfy the above design specifications, please determine the values of resistance $\text{'}R\text{'}$ and $\frac{W}{L}$ ratios of all the transistors. Additionally, determine the drain current $I_D$ and $V_{GSn}$ or $V_{GSp}$ for all the transistors of the circuitry shown below.

$\{20$ marks$\}$