Question: ====CODE NEEDS TO BE IN VHDL AND DONE WITH STD_LOGIC====== (a) Construct an SM chart equivalent to the following state table. Test only one variable

====CODE NEEDS TO BE IN VHDL AND DONE WITH STD_LOGIC====== (a)

====CODE NEEDS TO BE IN VHDL AND DONE WITH STD_LOGIC======

(a) Construct an SM chart equivalent to the following state table. Test only one variable in each decision box. Try to minimize the number of decision boxes. (b) Write a VHDL description of the state machine based on the SM chart

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