Computer Architecture question:

2. The ARM Cortex M4 processor supports immediate operands but only in a very limited range. If you want to load a 32-bit operand into a register you can write the assembly instruction like this: ldr R4, 0x12345678; When the assembler sees this code it stores the immediate operand in code memory and sets up a relative load. For example ldr R4, [PC, 10]:Relative operand at PC + 10 At address PC + 10 it adds DCW ex1234 Where DCW is an assembler directive which stores a 16-bit number in memory. Why is this done? Why does the assembler change a 4 byte immediate operand to a relative address and store the 4 bytes in memory as a constant? Your answer should address both speed and space issues as well as the architecture of the ARM processor. 2. The ARM Cortex M4 processor supports immediate operands but only in a very limited range. If you want to load a 32-bit operand into a register you can write the assembly instruction like this: ldr R4, 0x12345678; When the assembler sees this code it stores the immediate operand in code memory and sets up a relative load. For example ldr R4, [PC, 10]:Relative operand at PC + 10 At address PC + 10 it adds DCW ex1234 Where DCW is an assembler directive which stores a 16-bit number in memory. Why is this done? Why does the assembler change a 4 byte immediate operand to a relative address and store the 4 bytes in memory as a constant? Your answer should address both speed and space issues as well as the architecture of the ARM processor