computer architecture

Question 5 (10 marks) Consider a five stage pipeline has stage delay of 40 ns, 20 ns, 30 ns, 50 ns and 10 ns, respectively. The inter stage delay time is 1 ns. a) Determine the pipeline cycle time. (2 marks) b) Determine the non-pipeline execution time. (2 marks) c) Determine the speed up ratio. (2 marks) d) Determine the pipeline time for 101 instructions. (2 marks) e) If it is allowed to split one of the pipeline stages into 2 equal halves, which pipeline stage would you choose? What is the new cycle time? (2 marks)