Question: Computer Architecture Reorder Buffer Please answers each question and clear Q1: Explain what happens when a branch instruction gets to the front of the ROB

Computer Architecture

Reorder Buffer

Please answers each question and clear

Q1: Explain what happens when a branch instruction gets to the front of the ROB queue. Include both correct-prediction and misprediction.

Q2: What additional hardware is necessary for loading the value field of a reservation station to support dual issue?

Q3: What additional hardware is necessary for loading the value field of a reservation station to support dual CDB?

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