Computer Organization Questions - Chapter 4 The Processor

11. Reschedule (i.e., re-order) the instructions within the loop to improve performance. The loop must still produce the same results. Show timing of this MIPS instruction sequence through the pipeline, for two iterations of the loop. Show all stalls clearly, and mark with arrows all cases where forwarding takes place, as in our lectures loop: lw St0, 0(Ss0) add StO, Stl, St0 addi Ss0, Ss0, 8 addi Ss1, Ss1, 4 bne Ss0, Ss5, loop