Computer System Architecture question.

We need to add the numeric values stored on three registers parallelly without using any temporary registers. As you know a full-adder adds one digit from two numbers while taking into account the carry coming over from the previous digit, and outputs the sum for this digit along with the carry out for the next digit. 1. Design a full adder circuit which accepts three digit values instead of two (i.e. digits coming from the same position of three different numbers) while taking into account the carry in and carry out. Hint: When you add two binary digits the maximum carry value that can spill to following digits is 1, on the other hand if you are adding three binary digits, the maximum carry value that can spill to following digits is 2, therefore 1 bit is not enough for carry. 2. Design a circuit which performs REGD=REGA + REGB+REGC in a parallel way, where each register is 4 bits long. On your schematic you can draw the full adder for three digits that you designed on part 1 as a symbol with 5 inputs (3 digits to sum + 2 bit carry) and 3 outputs (1 digit sum + 2 bit carry). Cino Cint N X X > N Y FA s C out FA S C FA out S out S Couto Couti