Consider $1-$D convolution, with $7-$element input $\{I0,I1,I2,I3,I4,I5,I6\},4-$element

weight $\{W0,W1,W2,W3\}$ and $4-$element output $\{O0,O1,O2,O4\}.$ The cache $($global

buffer$)$ can accommodate $2$ input elements, $2$ weights and $2$ output elements. Each global

buffer operates as a depth$-2$ FIFO. Initial output values are all zero and need not to be read

from the DRAM and all final output results need to be written back to the DRAM. There

is a single Processing Element. Please estimate the numbers of DRAM accesses for the

following scenarios and show intermediate results.

a$.$ Weight$-$stationary design $(3$ points$)$

b$.$ Output$-$stationary design $(3$ points$)$

c$.$ Weight$-$stationary while the output is partitioned into two tiles of equal size $(4$

points$)$