Consider a 16-bit processor with a directly mapped cache with 16 Byte cache blocks and 4 entries

2) Assume the following address sequence is used to access the cache: 0xA30, 0xA32, 0xA3F, 0xA40, 0xA70, OxA4D, OxA30, OxAOF. Determine whether the accesses hit or miss the cache. Use the cache block size and number of entries as in 1). Fill out the table below. Assume that all cache lines are invalid before the first access. (8 Points) Byte addressBlock address Tag Cache Index Hit or Miss? (binary) (hex) 0xA30 0xA32 OXA3F 0xA40 0xA70 0xA4D 0xA30 OxAOF (binary)