Consider a $3-$processor system employing a centralized shared$-$memory architecture with memory write through. Assume initial$-$memory state of $x$ and $Y$ to be $0.$ Complete the following table assuming write invalidation protocol. Note that $x$ and $Y$ memory locations refer to separate locations in each cache memory.

$\backslash$table$[[$Processor$,\backslash$table$[[$Processor A$],[$Cache$]],\backslash$table$[[$Processor B$],[$Cache$]],\backslash$table$[[$Processor C$],[$Cache$]],\backslash$table$[[$Mem$],[$Location$],[$X$]],\backslash$table$[[$Mem$],[$Location$],[$Y$]]]]$

Problem $2[20$ points$].$ Consider a $3-$processor system employing a centralized shared$-$memory architecture with memory write through. Assume initial$-$memory state of $x$ and $Y$ to be $0.$ Complete the following table assuming write invalidation protocol. Note that $x$ and $Y$ memory locations refer to separate locations in each cache memory.

$\backslash$table$[[$Processor$,\backslash$table$[[$Processor A$],[$Cache$]],\backslash$table$[[$Processor B$],[$Cache$]],\backslash$table$[[$Processor C$],[$Cache$]],\backslash$table$[[$Mem$],[$Location$],[$X$]],\backslash$table$[[$Mem$],[$Location$],[$Y$]]]]$

$\backslash$table$[[\backslash$table$[[$Processor$],[$Activity$]]],[],[],[$A writes $1$ to Y$],[$B reads X$],[$C reads Y$],[$A reads X$],[$B write $1$ to X$],[$B reads Y$],[$C reads X$],[$C writes $2$ to Y$],[$A reads Y$]]$

$\backslash$table$[[\backslash$table$[[$Processor$],[$Activity$]]],[],[],[$A writes $1$ to Y$],[$B reads X$],[$C reads Y$],[$A reads X$],[$B write $1$ to X$],[$B reads Y$],[$C reads X$],[$C writes $2$ to Y$],[$A reads Y$]]$