Consider a finite state machine (FSM) that recognizes the pattern "1101". The input to the FSM is a sequence of binary bits, one after the other. When the FSM receives 1101 as inputs in successive bits, it should output 1. Otherwise, the output should be 0.

For example

Input sequence: 11011011001101

FSM output: 00010010000001

**** This question has many incorrect answers on here, I am looking for an ORIGINAL SOLUTION!

1) Draw the state diagram for this FSM and describe what each state represents

2) How many bits are required to represent all the states?

3) Draw the output truth table for this FSM (e.g. if you need 2 bits (Q1, Q0) to represent all the states, then the truth table has 3 columns (Q1, Q0|output))

4) Draw the next state logic truth table for this FSM (e.g. if you need 2 bits (Q1, Q0) to represent all the states, then the truth table has 5 columns (input, Q1, Q0|Q1, Q0))

**** This question has many incorrect answers on here, I am looking for an ORIGINAL SOLUTION!