Consider a memory hierachy with two cache levels L$1$ and L$2,$ L$1$ with a miss rate of $8\%$ and L$2$ with a miss rate of $4\%$ and an access time of $5$ clock cycles. The main memory has an access time of $47$ clock cycles. Assume that $26\%$ of the instructions are loads and stores. The execution CPI is $1\mathrm{.}0.$

Compute the value for the CPI taking into account the memory stall cycles