Consider a memory system with a single cycle cache and $100$ cycle latency DRAM with

the processor and DRAM both operating at $1$ GHz$.$ The processor has two multiply$-$add

units and is capable of executing four instructions in each cycle. In each memory cycle, the

processor fetches four words. Now consider the problem of multiplying a dense matrix with

a vector using a two$-$loop dot$-$product formulation. The matrix is of dimension $2$K $\backslash$times $2$K$.$

Thus, each row of the matrix takes $8$ KB of storage. Assume the vector is already cached,

what is the sustained performance and arithmetic intensity in the best case of this technique

using a two$-$loop dot$-$product based matrix$-$vector product? $($State your assumptions$)$