Consider a modified version of the synchronous component Delay, called OddDelay, that has a Boolean input variable in, a Boolean output variable out, and two Boolean state variables x and y. Both the state variables are initialized to 0, and the reaction description is given by: bool in bool x = 0, bool y = 0 if y == True then out = x else out = 0; x := in; y :=y. bool out Fig. 1 Synchronous component OddDelay 1) Describe in words the behavior of the component OddDelay. (5%) 2) List a possible execution of the component in the following form if it is supplied with the sequence of inputs 0, 1, 1, 0, 1, 1 for the first six rounds. (10%) in/out (x, y) (x', y') 3) Is the component finite-state? Draw the state machine of the component (label the input and output on each state transition in the form of input/output (i.e., the output is determined by both current state and current input). (10%)