Consider a PISO Shift Register. Model the specific circuit by writing sequential code and then

simulate the behaviour, producing a full set of waveforms covering all possible input combinations.

The circuit must have the following requirements:

a$)$ A clock input for executing the shifting

b$)$ An $8-$bit parallel input Inpt for loading the shifting word

c$)$ A load input $LD$ when $"1"$ for loading the

d$)$ A left$/$right input LR for left shifting when $"0"$ and right shifting otherwise

e$)$ An outputs OutS that will extract the bits being shifted.

Do not use chat gpt$,$ the code Must be VHDL$,$sequential code $($withprocesses$).$Include in it the Truth table with explenation how this works.