Consider a simple hypothetical machine. The processor contains a single data register, accumulator $($AC$).$ Both instructions and data are $16$ bits long. Memory is $16-$bit words. The instruction format provides $4$ bits for the opcode, as many as $24=16$ different opcodes, up to $212=4096(4K)$ words of memory can be directly addressed. It is required to show the partial program execution steps as in Figure $1$ format for a program fragment that multiplies the contents of the memory word at address $940$ and the contents of the memory word at address $941$ and stores the result in the latter location. Update the registers and memory as needed in the steps. The PC should contain $300$ which is the address of the first instruction Note: the partial set of Op$-$Codes are as follows:

op$-$codes

$0001=$ Load AC from Memory

$0010=$ Store $AC$ to Memory

$0101=$ Add to AC from Memory

$0111=$ Mult with AC from Memory

Answer Q$3$: