Question: Consider four 5-bit registers A, B, C, and D using a bus structure capable of performing the following: C0: B A C1: D A +

Consider four 5-bit registers A, B, C, and D using a bus structure capable of performing the following: C0: B A C1: D A + B C2: A B + D C3: C A + C C4: B A . C C5: B C + D C6: D B C7: A B . D C0 through C7 are control signals. Assume regular outputs for each register, how many OR gates are needed to implement the bus structure?

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