Question: Consider four 5-bit registers A, B, C, and D using a bus structure capable of performing the following: Co:B FA C4:D +A+B Cz: A +B+D

Consider four 5-bit registers A, B, C, and D using a bus structure capable of performing the following: Co:B FA C4:D +A+B Cz: A +B+D Cz: C EA+C C4: B EA.C C5:B EC'+D Co: DFB C7: A +B'. D Co through C7 are control signals. A 3-bit counter and a decoder can be used to generate those signals. Assume regular outputs for each register, how many OR gates are needed to implement the bus structure? X One 2 input, One 3 input and Two 4 input OR gates Incorrect Five 8 input OR gates One 3 input and one 4 input OR gates Two 2 input OR gates X One 2 input, One 3 input and one 4 input OR gates Incorrect
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