Consider the ARM Assembly program part given below. Let the processor on which this piece of program will be executed have the 5-step pipeline feature. Since these stages are Fetch (F), Operand Fetch (O), Execute (E), Memory (M) and Operand Writeback (W) ,

a) If the command and data memories are on separate hardware and the bypass (forwarding) technique is not used

b) If the command and data memories are on the same hardware and the bypass (forwarding) technique is not used

b) For the situation where the command and data memories are on the same hardware and the bypass (forwarding) technique is used

Draw the Pipeline diagram of this program segment.

LDR R1, [R6]

ADD R1, R1, #1

LDR R2, [R6, #4]

ADD R3, R2, #1

STR R3, [R6, #8]