Consider the following 4-bit Comparator. Assume both unsigned binary inputs have been set to 0000 for a long time. At time t = Ons, A is loaded with 0010 and B is loaded with 0101. Trace the value of AgtB, AeqB and AltB by completing the following table given Tcomp is the propagation delay of each stage. a3 b3 a2b2 a1 b1 a0b0 Igt leq ilt a b in_gt out_gt in_eq out_eq in_lt out_lt a b in_gt out_gt in_eq out_eq in_lt out_lt a b in_gt out_gt in_eq out_eq Hin_lt out_lt a b in_gt out_gt in_eq out_eq in_lt out_lt Agt B - Aeq AltB Stage 3 Stage 2 Stage 1 Stage 0 AgtB AeqB AltB Time (tcomp) 0 1 2 3 4 Consider the following 4-bit Comparator. Assume both unsigned binary inputs have been set to 0000 for a long time. At time t = Ons, A is loaded with 0010 and B is loaded with 0101. Trace the value of AgtB, AeqB and AltB by completing the following table given Tcomp is the propagation delay of each stage. a3 b3 a2b2 a1 b1 a0b0 Igt leq ilt a b in_gt out_gt in_eq out_eq in_lt out_lt a b in_gt out_gt in_eq out_eq in_lt out_lt a b in_gt out_gt in_eq out_eq Hin_lt out_lt a b in_gt out_gt in_eq out_eq in_lt out_lt Agt B - Aeq AltB Stage 3 Stage 2 Stage 1 Stage 0 AgtB AeqB AltB Time (tcomp) 0 1 2 3 4