Consider the following code segment in C: A=B+C; C=B+F; Here is the generated MIPS code for this segment assuming all variables are in memory and are addressable as offsets from $t0: lw $t1, 0($t0) lw $t2, 4($t0) add $t3, $t1, $t2 sw $t3, 12($t0) lw $t4, 8($t0) add $t5, $t1, $t4 sw $t5, 16($t0) A. Find the hazards in this code segment and design the reservation table B. Remove the hazards by reordering the instructions and design the reservation table C. Calculate the speedup achieved after pipelining. Use Table 1 for clock cycles calculations

Instruction class Load word (1) Store word (sw) R-format (add, sub, AND. OR, slt) Branch (bea) Table 1 Instruction Register fetch read 200 PS 100 PS 200 PS 100 PS 200 ps 100 ps ALU Data Register Total operation access write time 200 ps 200 ps 100 ps 800 PS 200 ps 700 PS 200 ps 100 ps 600 ps 200 ps 200 PS 100 ps 200 PS 500 ps