Consider the instruction sequence as shown above. The instruction sequence number is parenthesis to the right of each instruction. The instructions are being executed within a superscalar CPU with reservation stations, a reorder buffer, and a standard register file. Indicate which instructions are still contained within the re-order buffer. Indicate which instructions have operands committed within the register file. Describe what is meant by the terms architectural state, lookahead state, and in-order state Assume the next instruction is an arithmetic operation that requests operands from R3 and R7 and produces a result in R8. Describe what would happen in the decode stage for such an instruction