Question: Consider the multicycle MIPS datapath we have discussed in class. Assume a benchmark executes instructions with the frequencies given below. Instruction Type Latency in cycles
Consider the multicycle MIPS datapath we have discussed in class. Assume a benchmark executes instructions with the frequencies given below.
| Instruction Type | Latency in cycles | Instr. Frequencies |
| Load | 5 cycles | 10 % |
| Store | 4 cycles | 10 % |
| Register Type | 3 cycle | 50 % |
| Conditional Branch | 3 cycles | 25 % |
| Jump | 4 cycles | 5 % |
1. Assuming no hazards occur what is the average CPI for the given benchmark?
2. Compute the new CPI assuming the following hazards occur simultaneously
branches are miss-predicted 25% of the time and suffer a 2 cycle miss-prediction penalty,
the data memory misses 20% of the time with a penalty of 3 cycles. Consider loads only.
Ignore any other hazards.
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