Consider this truth table:

A	B	out1	out0
0	0	1	0
0	1	0	1
1	0	1	0
1	1	0	1

To complete the PLA:

Fill the PLA diagram that based on the table above

0 1 2 3 A -|---|---|---|-- A' -x---|---|---|-- B -|---|---|---|-- B' -x---|---|---|-- | | | | | | | | | | | | | | | | -x---|---x---|-- out1 -|---|---|---|-- out0

For each intersection in the AND plane (where intersections occur between the input wires and each possible input value), replace vertical bars with a single x where appropriate. The input value 0 is done for you.

For each intersection in the OR plane (where intersections occur between possible input values and outputs), replace vertical bars with a single x where appropriate. The output row for out1 is done for you.

You should not do any minimization on any of the output variables. Each row in the truth table corresponds to a column in the PLA. The binary number represented by the four input variables can be matched with the equivalent decimal number above each column in the PLA. (The row with inputs 00, for instance, can be matched with the column labeled 0, and the row with inputs 10 can be matched with the column labeled 2.)